SN74AHCT367DR |
RFQ for SN74AHCT367DR Required Field |
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| Technical/Catalog Information | SN74AHCT367DR |
| Vendor | Texas Instruments (VA) |
| Category | Integrated Circuits (ICs) |
| Logic Type | Line Driver, Non-Inverting |
| Package / Case | 16-SOIC (3.9mm Width) |
| Packaging | Cut Tape (CT) |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 2, 4 |
| Number of Elements | 2 - Dual |
| Operating Temperature | -40°C ~ 85°C |
| Voltage - Supply | 4.5 V ~ 5.5 V |
| Current - Output High, Low | 8mA, 8mA |
| Drawing Number | 296; 4040047-4; D; 16 |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | SN74AHCT367DR SN74AHCT367DR 296 4735 1 ND 29647351ND 296-4735-1 |
| Product | Manufacturers | Pack | D/C |
| SN74AHCT367DR | - | - | 05+ |
The 'AHCT367 devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE and 2OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features |
| ` Inputs Are TTL-Voltage Compatible` True Outputs` Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II` ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) |
